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#mos6502

2 Beiträge1 Beteiligte*r0 Beiträge heute

Hrmm, I think I'm going to do a bit of work on the MOS6502 emulator. I still need to implement interrupts and get those ironed out. Not 100% sure how I want to do it, but figure it shouldn't be too horrible. Also, I improved the docs as well because I couldn't remember how to compile the assembly code...lol

github.com/JamesTheBard/mos650

A MOS6502 emulator written in Python. Contribute to JamesTheBard/mos6502 development by creating an account on GitHub.
GitHubGitHub - JamesTheBard/mos6502: A MOS6502 emulator written in PythonA MOS6502 emulator written in Python. Contribute to JamesTheBard/mos6502 development by creating an account on GitHub.

I recently took a dive into #C11 #atomics to come up with alternative queue implementations not requiring locking some #mutex.

TBH, I have a hard time understanding the #memory #ordering constraints defined by C11. I mean, I code #assembler on a #mos6502 (for the #c64), so caches, pipelines and all that modern crap is kind of alien rocket science anyways 😆.

But seriously, they try to abstract from what the hardware provides (different kinds of memory barrier instructions, IMHO somewhat easier to understand), so the compiler can pick the appropriate one depending on the target CPU. But wrapping your head around their definition really hurts the brain 🙈.

Yesterday, I found a source telling me that #amd64 (or #x86 in general?) always has strong ordering for reads, so no matter which oderding constraint you put in your atomic_load and friends, the compiler will generate the same code and it will work. Oh boy, how should I ever verify my code works on e.g. aarch64 without owning such hardware?

Antwortete im Thread

@jbqueru @gumnos @mms Well, it has a PC of course, which is technically an "address register" 😏 not a general-purpose one though.

Instructions are simple 8bit values (operation and mode combined to one opcode) and regarding which modes are available for which operation, I'd say you get quickly used to it. It's (partially) related to the purposes of the registers. None is really "general purpose", only A comes close, but yep, it can't do one thing X and Y can do: count.

#mos6502 coders use the "#zeropage" in a way you'd otherwise use additional registers, which makes a lot of sense. The clocks for RAM and CPU are the same, RAM accesses need few clock cycles, and for the zeropage even fewer. There you can have your "address registers", 16 bits stored in little-endian.

Je rattrape (un peu) mon retard dans les montages à assembler avec ces deux "NOP testers" pour #z80 et #mos6502
Et un NOP testeur céquoidon ? C'est un montage qui permet de vérifier qu'un microprocesseur est vivant en présentant la commande NOP sur le bus de données (câblée en dur sur le circuit) et en regardant ce qu'il se passe sur le bus d'adresse : la commande NOP ne faisant rien le processeur passe juste à l'instruction suivante ce qui a pour effet d'incrémenter l'adresse, visualisée ici avec une série de LEDs.
L'horloge est ici un 555 pour que ça aille assez lentement pour y voir quelque chose !
#retrocomputing