Felix Palmen :freebsd: :c64:<p>I recently took a dive into <a href="https://mastodon.bsd.cafe/tags/C11" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>C11</span></a> <a href="https://mastodon.bsd.cafe/tags/atomics" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>atomics</span></a> to come up with alternative queue implementations not requiring locking some <a href="https://mastodon.bsd.cafe/tags/mutex" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>mutex</span></a>.</p><p>TBH, I have a hard time understanding the <a href="https://mastodon.bsd.cafe/tags/memory" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>memory</span></a> <a href="https://mastodon.bsd.cafe/tags/ordering" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ordering</span></a> constraints defined by C11. I mean, I code <a href="https://mastodon.bsd.cafe/tags/assembler" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>assembler</span></a> on a <a href="https://mastodon.bsd.cafe/tags/mos6502" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>mos6502</span></a> (for the <a href="https://mastodon.bsd.cafe/tags/c64" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>c64</span></a>), so caches, pipelines and all that modern crap is kind of alien rocket science anyways 😆.</p><p>But seriously, they try to abstract from what the hardware provides (different kinds of memory barrier instructions, IMHO somewhat easier to understand), so the compiler can pick the appropriate one depending on the target CPU. But wrapping your head around their definition really hurts the brain 🙈.</p><p>Yesterday, I found a source telling me that <a href="https://mastodon.bsd.cafe/tags/amd64" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>amd64</span></a> (or <a href="https://mastodon.bsd.cafe/tags/x86" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>x86</span></a> in general?) always has strong ordering for reads, so no matter which oderding constraint you put in your atomic_load and friends, the compiler will generate the same code and it will work. Oh boy, how should I ever verify my code works on e.g. aarch64 without owning such hardware?</p>