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#risc

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argv minus one<p>In the 1980s, a whole lot of computer and CPU vendors introduced shiny new <a href="https://mastodon.sdf.org/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> processors, like ARM, MIPS, POWER, and SPARC. Many of these were quite successful in the video game, workstation, and supercomputer markets.</p><p>Except Intel, whose old-fashioned x86 machines somehow ended up outperforming almost all of the RISCs.</p><p>How did that happen?</p><p><a href="https://mastodon.sdf.org/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>retrocomputing</span></a></p>
IT News<p>160-core RISC V Board is the m.2 CoProcessor You Didn’t know you needed - Aside from GPUs, you don’t hear much about co-processors these days. [bitluni] per... - <a href="https://hackaday.com/2025/07/07/160-core-risc-v-board-is-the-m-2-coprocessor-you-didnt-know-you-needed/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">hackaday.com/2025/07/07/160-co</span><span class="invisible">re-risc-v-board-is-the-m-2-coprocessor-you-didnt-know-you-needed/</span></a> <a href="https://schleuss.online/tags/microcontrollers" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>microcontrollers</span></a> <a href="https://schleuss.online/tags/clustercomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>clustercomputing</span></a> <a href="https://schleuss.online/tags/ch32v003" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ch32v003</span></a> <a href="https://schleuss.online/tags/m" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>m</span></a>.2slot <a href="https://schleuss.online/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a>-v</p>
Risotto Bias<p>What does the cores to RAM ratio look like if your chip:</p><p>- is risc and doesn't have aes optimizations<br>- has per core "ram"<br>- doesn't allow cores to peek at each other's caches or buses<br>- doesn't have branch prediction <br>- communication in or out of the core means a specific location in ram needs to be written to <br>- has dedicated interrupt affinity cores<br>- has dedicated privileged cores<br>- lacks microcode</p><p><a href="https://toot.risottobias.org/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a></p>
Hacker News<p>Ubuntu 25.10 Raises RISC-V Profile Requirements</p><p><a href="https://www.omgubuntu.co.uk/2025/06/ubuntu-riscv-rva23-support" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">omgubuntu.co.uk/2025/06/ubuntu</span><span class="invisible">-riscv-rva23-support</span></a></p><p><a href="https://mastodon.social/tags/HackerNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HackerNews</span></a> <a href="https://mastodon.social/tags/Ubuntu" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Ubuntu</span></a> <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V25.10 <a href="https://mastodon.social/tags/OpenSource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenSource</span></a> <a href="https://mastodon.social/tags/Technology" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Technology</span></a></p>
Roy Charles<p>Ubuntu 25.10 Raises RISC-V Profile Requirements - OMG! Ubuntu <a href="https://share.google/0Ejv74R6CaTqqvmQJ" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="">share.google/0Ejv74R6CaTqqvmQJ</span><span class="invisible"></span></a> <br><a href="https://mastodon.social/tags/Tech" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Tech</span></a> <a href="https://mastodon.social/tags/Linux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Linux</span></a> <a href="https://mastodon.social/tags/Ubuntu" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Ubuntu</span></a> <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V</p>
Blake Patterson<p>Did you know that the 'NT' in Windows NT stood for "Nine Ten"? </p><p>The intended core platform for the OS was the then-expected Intel i910 RISC processor, which was to be the rebranded moniker for the i860 that can be found in the wild. *</p><p>It never came to be due to the i860s terrible handling of context switching -- a capability that a CPU for a multitasking, multiuser workstation OS must be able to do _very_efficiently_. The i860 wasn't. </p><p><a href="https://www.youtube.com/watch?v=WTkFGZqVCM8&amp;t=459s" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">youtube.com/watch?v=WTkFGZqVCM</span><span class="invisible">8&amp;t=459s</span></a></p><p>*** EDIT: Several have pointed to sources indicating differently that NT stood for N10, which was the codename for the i860, so -- N10, N-Ten &gt; NT. </p><p><a href="https://oldbytes.space/tags/TIL" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TIL</span></a> <a href="https://oldbytes.space/tags/WindowsNT" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>WindowsNT</span></a> <a href="https://oldbytes.space/tags/Windows" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Windows</span></a> <a href="https://oldbytes.space/tags/Intel" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Intel</span></a> <a href="https://oldbytes.space/tags/i860" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>i860</span></a> <a href="https://oldbytes.space/tags/i910" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>i910</span></a> <a href="https://oldbytes.space/tags/vintagecomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>vintagecomputing</span></a> <a href="https://oldbytes.space/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>retrocomputing</span></a> <a href="https://oldbytes.space/tags/OS" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OS</span></a> <a href="https://oldbytes.space/tags/techhistory" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>techhistory</span></a> <a href="https://oldbytes.space/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> <a href="https://oldbytes.space/tags/x86" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>x86</span></a> <a href="https://oldbytes.space/tags/processors" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>processors</span></a> <a href="https://oldbytes.space/tags/computers" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>computers</span></a> <a href="https://oldbytes.space/tags/computinghistory" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>computinghistory</span></a> <a href="https://oldbytes.space/tags/Microsoft" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Microsoft</span></a></p>
jbz<p>"Have you ever designed your own ISA, built a processor of that ISA on FPGA, and built a compiler for it? Furthermore, have you run an operating system on that processor? Actually, we have."</p><p><a href="https://fuel.edby.coffee/posts/how-we-ported-xv6-os-to-a-home-built-cpu-with-a-home-built-c-compiler" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">fuel.edby.coffee/posts/how-we-</span><span class="invisible">ported-xv6-os-to-a-home-built-cpu-with-a-home-built-c-compiler</span></a></p><p><a href="https://indieweb.social/tags/homebrew" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>homebrew</span></a> <a href="https://indieweb.social/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a></p>
Wolfgang Stief<p>»Advances in silicon and processing technologies now give us clock speeds in excess of 40 MHz and chips with 1 million transistors!«</p><p>Source: Victor K. L. Huang – High-Performance Microprocessors: The RISC Dilemma, in “IEEE Micro August 1989 <a href="https://mastodon.social/tags/vintagecomputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>vintagecomputing</span></a> <a href="https://mastodon.social/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a> <a href="https://mastodon.social/tags/techhistory" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>techhistory</span></a></p>
derSammler<p>For your viewing pleasure: the mainboard from a <a href="https://oldbytes.space/tags/digital" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>digital</span></a> <a href="https://oldbytes.space/tags/AlphaStation" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AlphaStation</span></a> 255 and the beautiful 300 MHz Alpha 21064 CPU.</p><p><a href="https://oldbytes.space/tags/RetroComputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RetroComputing</span></a> <a href="https://oldbytes.space/tags/DEC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>DEC</span></a> <a href="https://oldbytes.space/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> <a href="https://oldbytes.space/tags/AXP" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AXP</span></a></p>
Hacker News<p>Open-Source RISC-V: Energy Efficiency of Superscalar, Out-of-Order Execution</p><p><a href="https://arxiv.org/abs/2505.24363" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="">arxiv.org/abs/2505.24363</span><span class="invisible"></span></a></p><p><a href="https://mastodon.social/tags/HackerNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HackerNews</span></a> <a href="https://mastodon.social/tags/OpenSource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenSource</span></a> <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V <a href="https://mastodon.social/tags/EnergyEfficiency" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>EnergyEfficiency</span></a> <a href="https://mastodon.social/tags/Superscalar" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Superscalar</span></a> <a href="https://mastodon.social/tags/OutOfOrderExecution" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OutOfOrderExecution</span></a></p>
Hacker News<p>RISC-V in AI and HPC Part 1: Per Aspera Ad Astra?</p><p><a href="https://www.eetimes.com/risc-v-in-ai-and-hpc-part-1-per-aspera-ad-astra/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">eetimes.com/risc-v-in-ai-and-h</span><span class="invisible">pc-part-1-per-aspera-ad-astra/</span></a></p><p><a href="https://mastodon.social/tags/HackerNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HackerNews</span></a> <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V <a href="https://mastodon.social/tags/AI" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AI</span></a> <a href="https://mastodon.social/tags/HPC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HPC</span></a> <a href="https://mastodon.social/tags/PerAsperaAdAstra" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>PerAsperaAdAstra</span></a> <a href="https://mastodon.social/tags/Technology" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Technology</span></a></p>
Kevin Karhan :verified:<p><span class="h-card" translate="no"><a href="https://digipres.club/@foone" class="u-url mention" rel="nofollow noopener" target="_blank">@<span>foone</span></a></span> yeah, even <a href="https://infosec.space/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> ISAs like <a href="https://infosec.space/tags/RUSCv" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RUSCv</span></a> have <a href="https://en.m.wikipedia.org/wiki/RISC-V" rel="nofollow noopener" target="_blank">at least 40</a> (<code>RV32E</code>)...</p>
Verfassungklage@troet.cafe<p><a href="https://troet.cafe/tags/WCH" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>WCH</span></a> <a href="https://troet.cafe/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V-MCUs im Test: Was können 10-Cent- <a href="https://troet.cafe/tags/Mikrocontroller" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Mikrocontroller</span></a> aus <a href="https://troet.cafe/tags/China" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>China</span></a>? </p><p>Auf den ersten Blick ist das Angebot von <a href="https://troet.cafe/tags/WCH" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>WCH</span></a> ziemlich erschlagend: Zur Auswahl stehen Dutzende Varianten mit unterschiedlichster Peripherie – diese reicht bis zu Ethernet- und USB-2.0-Schnittstellen. Bei vielen handelt es sich allerdings um reine <a href="https://troet.cafe/tags/Protokollwandler" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Protokollwandler</span></a>, die für uns uninteressant sind. Wir haben uns für die <a href="https://troet.cafe/tags/Modelle" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Modelle</span></a> <a href="https://troet.cafe/tags/CH32V003" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>CH32V003</span></a>, <a href="https://troet.cafe/tags/CH32V203" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>CH32V203</span></a> und <a href="https://troet.cafe/tags/CH570" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>CH570</span></a> entschieden. </p><p><a href="https://www.golem.de/news/wch-risc-v-mcus-im-test-was-koennen-10-cent-mikrocontroller-aus-china-2506-196719.html" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">golem.de/news/wch-risc-v-mcus-</span><span class="invisible">im-test-was-koennen-10-cent-mikrocontroller-aus-china-2506-196719.html</span></a></p>
µP<p>Looking for a $1 <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> computer that runs <a href="https://mastodon.social/tags/BASIC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>BASIC</span></a>?</p><p>Here you are: <a href="https://www.olimex.com/Products/Retro-Computers/RVPC/open-source-hardware" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">olimex.com/Products/Retro-Comp</span><span class="invisible">uters/RVPC/open-source-hardware</span></a></p>
IT News<p>A RISC-V Operating System Instruction Manual - To some, an operating system is a burden or waste of resources, like those working... - <a href="https://hackaday.com/2025/05/26/a-risc-v-operating-system-instruction-manual/" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">hackaday.com/2025/05/26/a-risc</span><span class="invisible">-v-operating-system-instruction-manual/</span></a> <a href="https://schleuss.online/tags/operatingsystem" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>operatingsystem</span></a> <a href="https://schleuss.online/tags/softwarehacks" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>softwarehacks</span></a> <a href="https://schleuss.online/tags/educational" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>educational</span></a> <a href="https://schleuss.online/tags/cornell" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>cornell</span></a> <a href="https://schleuss.online/tags/course" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>course</span></a> <a href="https://schleuss.online/tags/risc" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>risc</span></a>-v <a href="https://schleuss.online/tags/os" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>os</span></a></p>
TOV<p>RISC-V is a free and open-source instruction set architecture (ISA) for developing custom processors. It is an alternative to proprietary ISAs like ARM and x86, allowing anyone to design, manufacture, and sell RISC-V chips without needing expensive licensing. RISC-V is based on the principles of Reduced Instruction Set Computing (RISC), and has gained popularity due to its open nature and flexibility.</p><p><a href="https://fosstodon.org/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a> <a href="https://fosstodon.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a></p>
Hacker News<p>Rocky Linux 10 Will Support RISC-V</p><p><a href="https://rockylinux.org/news/rockylinux-support-for-riscv" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">rockylinux.org/news/rockylinux</span><span class="invisible">-support-for-riscv</span></a></p><p><a href="https://mastodon.social/tags/HackerNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HackerNews</span></a> <a href="https://mastodon.social/tags/RockyLinux" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RockyLinux</span></a> <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V <a href="https://mastodon.social/tags/LinuxSupport" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>LinuxSupport</span></a> <a href="https://mastodon.social/tags/OpenSource" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>OpenSource</span></a> <a href="https://mastodon.social/tags/TechNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>TechNews</span></a></p>
Hacker News<p>Confidential computing for high-assurance RISC-V embedded systems</p><p><a href="https://github.com/IBM/ACE-RISCV" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="">github.com/IBM/ACE-RISCV</span><span class="invisible"></span></a></p><p><a href="https://mastodon.social/tags/HackerNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HackerNews</span></a> <a href="https://mastodon.social/tags/ConfidentialComputing" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>ConfidentialComputing</span></a> <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V <a href="https://mastodon.social/tags/EmbeddedSystems" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>EmbeddedSystems</span></a> <a href="https://mastodon.social/tags/HighAssurance" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HighAssurance</span></a> <a href="https://mastodon.social/tags/CyberSecurity" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>CyberSecurity</span></a> <a href="https://mastodon.social/tags/IBMACE" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>IBMACE</span></a></p>
Hacker News<p>Implementing a RISC-V Hypervisor</p><p><a href="https://seiya.me/blog/riscv-hypervisor" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="">seiya.me/blog/riscv-hypervisor</span><span class="invisible"></span></a></p><p><a href="https://mastodon.social/tags/HackerNews" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>HackerNews</span></a> <a href="https://mastodon.social/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V <a href="https://mastodon.social/tags/Hypervisor" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Hypervisor</span></a> <a href="https://mastodon.social/tags/Hypervisor" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Hypervisor</span></a> <a href="https://mastodon.social/tags/Development" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Development</span></a> <a href="https://mastodon.social/tags/Tech" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Tech</span></a> <a href="https://mastodon.social/tags/Innovation" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Innovation</span></a> <a href="https://mastodon.social/tags/Open" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Open</span></a> <a href="https://mastodon.social/tags/Source" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Source</span></a> <a href="https://mastodon.social/tags/Virtualization" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Virtualization</span></a></p>
warthog9<p>Have a couple more openings on my team for folks if you want to come play:</p><p>First up is a Rust developer, mostly working on things like Luwen and working on moving some of our python based tools down to rust based tools. Lots of things coming, and all down in the systems stack.</p><p><a href="https://job-boards.greenhouse.io/tenstorrent/jobs/4736078007" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">job-boards.greenhouse.io/tenst</span><span class="invisible">orrent/jobs/4736078007</span></a></p><p>Second up is someone to come work on the OSPO side of things, day to day chasing stuff down on that front, getting out ahead, policy stuff, and some side scripting to help make things in a few directions better.</p><p><a href="https://job-boards.greenhouse.io/tenstorrent/jobs/4736080007" rel="nofollow noopener" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">job-boards.greenhouse.io/tenst</span><span class="invisible">orrent/jobs/4736080007</span></a></p><p>Solid team, lots of interesting problems, and we are working in the open on open source tooling for things here.</p><p>Worth taking a look!</p><p><a href="https://social.afront.org/tags/FediHire" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>FediHire</span></a> <a href="https://social.afront.org/tags/Tenstorrent" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>Tenstorrent</span></a> <a href="https://social.afront.org/tags/RISC" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISC</span></a>-V <a href="https://social.afront.org/tags/RISCV" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>RISCV</span></a> <a href="https://social.afront.org/tags/AI" class="mention hashtag" rel="nofollow noopener" target="_blank">#<span>AI</span></a></p>